<html><head><meta name="color-scheme" content="light dark"></head><body><pre style="word-wrap: break-word; white-space: pre-wrap;">From 89c6d9b095e9931ec42f0d0ab144c11567ebefdb Mon Sep 17 00:00:00 2001
From: David Gibson &lt;dgibson@redhat.com&gt;
Date: Fri, 24 Jul 2015 05:26:16 +0200
Subject: [PATCH 54/58] spapr: Add LMB DR connectors

Message-id: &lt;1437715580-14817-25-git-send-email-dgibson@redhat.com&gt;
Patchwork-id: 67141
O-Subject: [RHEL7.2 qemu-kvm-rhev PATCHv3 24/28] spapr: Add LMB DR connectors
Bugzilla: 1211117
RH-Acked-by: Laurent Vivier &lt;lvivier@redhat.com&gt;
RH-Acked-by: Igor Mammedov &lt;imammedo@redhat.com&gt;
RH-Acked-by: Laszlo Ersek &lt;lersek@redhat.com&gt;

Enable memory hotplug for pseries 2.4 and add LMB DR connectors.
With memory hotplug, enforce RAM size, NUMA node memory size and maxmem
to be a multiple of SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the
granularity in which LMBs are represented and hot-added.

LMB DR connectors will be used by the memory hotplug code.

Signed-off-by: Bharata B Rao &lt;bharata@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Roth &lt;mdroth@linux.vnet.ibm.com&gt;
               [spapr_drc_reset implementation]
Signed-off-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
(cherry picked from commit ee160a16bf80dc42058795635961c3a41bc79351)

Signed-off-by: David Gibson &lt;dgibson@redhat.com&gt;
Signed-off-by: Miroslav Rezanina &lt;mrezanin@redhat.com&gt;
---
 hw/ppc/spapr.c         | 87 ++++++++++++++++++++++++++++++++++++++++++++++++++
 include/hw/ppc/spapr.h |  1 +
 2 files changed, 88 insertions(+)

diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index a6fd7ea..b48d1d8 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -59,6 +59,7 @@
 #include "hw/nmi.h"
 
 #include "hw/compat.h"
+#include "qemu-common.h"
 
 #include &lt;libfdt.h&gt;
 
@@ -1436,10 +1437,84 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu)
     qemu_register_reset(spapr_cpu_reset, cpu);
 }
 
+/*
+ * Reset routine for LMB DR devices.
+ *
+ * Unlike PCI DR devices, LMB DR devices explicitly register this reset
+ * routine. Reset for PCI DR devices will be handled by PHB reset routine
+ * when it walks all its children devices. LMB devices reset occurs
+ * as part of spapr_ppc_reset().
+ */
+static void spapr_drc_reset(void *opaque)
+{
+    sPAPRDRConnector *drc = opaque;
+    DeviceState *d = DEVICE(drc);
+
+    if (d) {
+        device_reset(d);
+    }
+}
+
+static void spapr_create_lmb_dr_connectors(sPAPRMachineState *spapr)
+{
+    MachineState *machine = MACHINE(spapr);
+    uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE;
+    uint32_t nr_rma_lmbs = spapr-&gt;rma_size/lmb_size;
+    uint32_t nr_lmbs = machine-&gt;maxram_size/lmb_size - nr_rma_lmbs;
+    uint32_t nr_assigned_lmbs = machine-&gt;ram_size/lmb_size - nr_rma_lmbs;
+    int i;
+
+    for (i = 0; i &lt; nr_lmbs; i++) {
+        sPAPRDRConnector *drc;
+        uint64_t addr;
+
+        if (i &lt; nr_assigned_lmbs) {
+            addr = (i + nr_rma_lmbs) * lmb_size;
+        } else {
+            addr = (i - nr_assigned_lmbs) * lmb_size +
+                    spapr-&gt;hotplug_memory.base;
+        }
+        drc = spapr_dr_connector_new(OBJECT(spapr), SPAPR_DR_CONNECTOR_TYPE_LMB,
+                                     addr/lmb_size);
+        qemu_register_reset(spapr_drc_reset, drc);
+    }
+}
+
+/*
+ * If RAM size, maxmem size and individual node mem sizes aren't aligned
+ * to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
+ * since we can't support such unaligned sizes with DRCONF_MEMORY.
+ */
+static void spapr_validate_node_memory(MachineState *machine)
+{
+    int i;
+
+    if (machine-&gt;maxram_size % SPAPR_MEMORY_BLOCK_SIZE ||
+        machine-&gt;ram_size % SPAPR_MEMORY_BLOCK_SIZE) {
+        error_report("Can't support memory configuration where RAM size "
+                     "0x" RAM_ADDR_FMT " or maxmem size "
+                     "0x" RAM_ADDR_FMT " isn't aligned to %llu MB",
+                     machine-&gt;ram_size, machine-&gt;maxram_size,
+                     SPAPR_MEMORY_BLOCK_SIZE/M_BYTE);
+        exit(EXIT_FAILURE);
+    }
+
+    for (i = 0; i &lt; nb_numa_nodes; i++) {
+        if (numa_info[i].node_mem % SPAPR_MEMORY_BLOCK_SIZE) {
+            error_report("Can't support memory configuration where memory size"
+                         " %" PRIx64 " of node %d isn't aligned to %llu MB",
+                         numa_info[i].node_mem, i,
+                         SPAPR_MEMORY_BLOCK_SIZE/M_BYTE);
+            exit(EXIT_FAILURE);
+        }
+    }
+}
+
 /* pSeries LPAR / sPAPR hardware init */
 static void ppc_spapr_init(MachineState *machine)
 {
     sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
+    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
     const char *kernel_filename = machine-&gt;kernel_filename;
     const char *kernel_cmdline = machine-&gt;kernel_cmdline;
     const char *initrd_filename = machine-&gt;initrd_filename;
@@ -1518,6 +1593,10 @@ static void ppc_spapr_init(MachineState *machine)
                                                smp_threads),
                                   XICS_IRQS);
 
+    if (smc-&gt;dr_lmb_enabled) {
+        spapr_validate_node_memory(machine);
+    }
+
     /* init CPUs */
     if (machine-&gt;cpu_model == NULL) {
         machine-&gt;cpu_model = kvm_enabled() ? "host" : "POWER7";
@@ -1567,6 +1646,10 @@ static void ppc_spapr_init(MachineState *machine)
                                     &amp;spapr-&gt;hotplug_memory.mr);
     }
 
+    if (smc-&gt;dr_lmb_enabled) {
+        spapr_create_lmb_dr_connectors(spapr);
+    }
+
     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
     if (!filename) {
         hw_error("Could not find LPAR rtas '%s'\n", "spapr-rtas.bin");
@@ -1840,6 +1923,7 @@ static void spapr_nmi(NMIState *n, int cpu_index, Error **errp)
 static void spapr_machine_class_init(ObjectClass *oc, void *data)
 {
     MachineClass *mc = MACHINE_CLASS(oc);
+    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
     FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
     NMIClass *nc = NMI_CLASS(oc);
 
@@ -1853,6 +1937,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data)
     mc-&gt;kvm_type = spapr_kvm_type;
     mc-&gt;has_dynamic_sysbus = true;
 
+    smc-&gt;dr_lmb_enabled = false;
     fwc-&gt;get_dev_path = spapr_get_fw_dev_path;
     nc-&gt;nmi_monitor_handler = spapr_nmi;
 }
@@ -1941,11 +2026,13 @@ static const TypeInfo spapr_machine_2_3_info = {
 static void spapr_machine_rhel720_class_init(ObjectClass *oc, void *data)
 {
     MachineClass *mc = MACHINE_CLASS(oc);
+    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
 
     mc-&gt;name = "pseries-rhel7.2.0";
     mc-&gt;desc = "RHEL 7.2.0 pSeries Logical Partition (PAPR compliant)";
     mc-&gt;alias = "pseries";
     mc-&gt;is_default = 1;
+    smc-&gt;dr_lmb_enabled = true;
 }
 
 static const TypeInfo spapr_machine_rhel720_info = {
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 3671d5a..d8ddf20 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -35,6 +35,7 @@ struct sPAPRMachineClass {
     MachineClass parent_class;
 
     /*&lt; public &gt;*/
+    bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs */
 };
 
 /**
-- 
1.8.3.1

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